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| Name | Last modified | Size | Description |
|---|---|---|---|---|
| Parent Directory | - | ||
| 8-bit shift register (SHIFT8).ssc | 2025-04-04 22:08 | 24K | |
| 3-bit down-counter with load (DCNT3L).ssc | 2025-04-04 22:08 | 5.6K | |
| T flip-flop with preset (TFFP).ssc | 2025-04-04 22:08 | 4.8K | |
| Full-adder (FA).ssc | 2025-04-04 22:08 | 4.5K | |
| Divider FSM control logic (DIVFSM).ssc | 2025-04-04 22:08 | 19K | |
| D flip-flop with clear and preset (DFFCP).ssc | 2025-04-04 22:08 | 7.1K | |
| Delay (DLY).ssc | 2025-04-04 22:08 | 2.1K | |
| 8-bit synchronous up-counter with enable (CNTR8).ssc | 2025-04-04 22:08 | 12K | |
| 8-bit select or clear (SELCLR8).ssc | 2025-04-04 22:08 | 8.5K | |
| 8-bit register (REG8).ssc | 2025-04-04 22:08 | 10K | |
| 8-bit divider test circuit.ssc | 2025-04-04 22:08 | 21K | |
| 8-bit divider circuit.ssp | 2025-04-04 22:08 | 914 | |
| 8-bit divider (DIV8).ssc | 2025-04-04 22:08 | 29K | |
| 8-bit adder (ADD8).ssc | 2025-04-04 22:08 | 12K | |