Name | Last modified | Size | Description | |
---|---|---|---|---|
Parent Directory | - | |||
processor.ssc | 2024-12-14 05:23 | 101K | ||
memory controller.ssc | 2024-12-14 05:23 | 48K | ||
up set counter 16.ssc | 2024-12-14 05:23 | 32K | ||
16 bit bidirectional controller.ssc | 2024-12-14 05:23 | 24K | ||
16 state selector.ssc | 2024-12-14 05:23 | 23K | ||
16 bit addition using full adder.ssc | 2024-12-14 05:23 | 22K | ||
16 bit 2 to 1.ssc | 2024-12-14 05:23 | 22K | ||
16 bit d flipflop array.ssc | 2024-12-14 05:23 | 17K | ||
16 bit tristate.ssc | 2024-12-14 05:23 | 16K | ||
computer.ssc | 2024-12-14 05:23 | 12K | ||
processor fsm.ssc | 2024-12-14 05:23 | 11K | ||
memory controller fsm.ssc | 2024-12-14 05:23 | 9.6K | ||
full adder.ssc | 2024-12-14 05:23 | 4.1K | ||
state selector bit.ssc | 2024-12-14 05:23 | 3.0K | ||
bidirectional controller.ssc | 2024-12-14 05:23 | 2.4K | ||
half adder.ssc | 2024-12-14 05:23 | 2.3K | ||
delay 2.ssc | 2024-12-14 05:23 | 1.3K | ||
sbn oisc.ssp | 2024-12-14 05:23 | 955 | ||
readme.txt | 2024-12-14 05:23 | 593 | ||
programs/ | 2024-12-14 05:23 | - | ||